Name
Thermal Atomic Layer Deposition of Low Resistivity Metallic Films for High Aspect-Ratio Via Seed
Date
Thursday, May 22, 2025
Time
4:20 PM - 4:40 PM
Description

Dane Lindblad1, Irina Stateikina1, Marc Guilmain1, Sara Harris1, Xavier Gaudreau-Miron2, Arrelaine Dameron1, Matt Weimer1
1Forge Nano, Thornton, CO
2C2MI, Bromont, QC, Canada
Scaling interconnects to increase device density is a critical bottle neck for a range of applications from complementary metal oxide semiconductor (CMOS) to microelectromechanical (MEMS) switches and other devices. Commonly, Cu is the interconnect metal of choice to fill vias but comes with significant challenges. A diffusion barrier is applied to ensure Cu migration does not cause electrical breakdown between vias and a metal seed layer is required to ensure sufficient adhesion, as well as smooth and dense Cu electroplating. Uniform seed resistivity, correlated to seed thickness, is critical to produce low resistivity, void-free interconnects. Unfortunately, state-of-the-art processes for high quality metallic films are limited to line-of-sight techniques like chemical vapor deposition (CVD) or physical vapor deposition (PVD), limiting possible device pitch and architectures. When the aspect ratio (AR) increases above ~10:1 or have a line-of-sight obstruction at least one of these layers are missing, resulting in insufficiently thin seed for Cu electroplating nucleation. This creates a void in Cu fill or thickness gradient resulting in pinch-off at the top and ultimately high line resistance or device failure. Fortunately, atomic layer deposition (ALD) can produce high density, low resistivity metal films for both Cu diffusion barrier and electroplating seed applications. Here we report on a total solution using thermal ALD. Plasma enhanced ALD (PEALD) can produce quality metallic films at a reasonable thermal budget, unfortunately plasma processes have a limit to ARs that can be coated conformally and the added risk of surface plasma damage. Our all-thermal ALD solution has been demonstrated on Si vias ranging from 4:1 to 25:1 AR and through glass vias (TGV) up to 10:1 AR. First, a SiO2 ALD film is deposited as a dielectric barrier, then a thin TiN layer is applied as a Cu diffusion barrier, followed by a low resistivity Ru film for Cu adhesion. A novel TiN thermal ALD process at 300°C has been developed alongside a high-quality Ru film with resistivity values <20 uΩ·cm which can be deposited on SiO2, HfO2, Pt, and TiN. When compared to PVD, the ALD stack produces conformal and well adhered Cu electroplating to the Si via. Conversely, the PVD stack has voids at the bottom of each trench from poor adhesion of electroplated Cu and narrowing at the top from a resistivity gradient within the trench. This comparison demonstrates that ALD Ru seed provides sufficient adhesion for Cu electroplating and that the resistivity of the ALD Ru/TiN stack is low and consistent enough for conformal and dense Cu electroplating.

Speakers
Dane Lindblad - Forge Nano